initial commit
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120
ks/Models/FP56/Model_grt_rtw/rtGetNaN.cpp
Executable file
120
ks/Models/FP56/Model_grt_rtw/rtGetNaN.cpp
Executable file
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/*
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* rtGetNaN.cpp
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*
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* Code generation for model "Model".
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*
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* Model version : 1.2
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* Simulink Coder version : 9.7 (R2022a) 13-Nov-2021
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* C++ source code generated on : Sat Mar 28 11:28:04 2026
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*
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* Target selection: grt.tlc
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* Note: GRT includes extra infrastructure and instrumentation for prototyping
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* Embedded hardware selection: Intel->x86-64 (Windows64)
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* Code generation objectives: Unspecified
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* Validation result: Not run
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*/
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#include "rtwtypes.h"
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extern "C" {
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#include "rtGetNaN.h"
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}
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#include <stddef.h>
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extern "C" {
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#include "rt_nonfinite.h"
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}
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#define NumBitsPerChar 8U
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extern "C" {
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/*
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* Initialize rtNaN needed by the generated code.
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* NaN is initialized as non-signaling. Assumes IEEE.
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*/
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real_T rtGetNaN(void)
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{
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size_t bitsPerReal{ sizeof(real_T) * (NumBitsPerChar) };
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real_T nan{ 0.0 };
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if (bitsPerReal == 32U) {
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nan = rtGetNaNF();
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} else {
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uint16_T one = 1U;
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enum {
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LittleEndian,
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BigEndian
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} machByteOrder
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{
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(*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian
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};
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switch (machByteOrder) {
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case LittleEndian:
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{
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union {
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LittleEndianIEEEDouble bitVal;
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real_T fltVal;
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} tmpVal;
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tmpVal.bitVal.words.wordH = 0xFFF80000U;
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tmpVal.bitVal.words.wordL = 0x00000000U;
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nan = tmpVal.fltVal;
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break;
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}
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case BigEndian:
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{
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union {
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BigEndianIEEEDouble bitVal;
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real_T fltVal;
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} tmpVal;
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tmpVal.bitVal.words.wordH = 0x7FFFFFFFU;
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tmpVal.bitVal.words.wordL = 0xFFFFFFFFU;
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nan = tmpVal.fltVal;
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break;
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}
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}
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}
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return nan;
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}
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/*
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* Initialize rtNaNF needed by the generated code.
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* NaN is initialized as non-signaling. Assumes IEEE.
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*/
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real32_T rtGetNaNF(void)
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{
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IEEESingle nanF{ { 0.0F } };
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uint16_T one{ 1U };
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enum {
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LittleEndian,
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BigEndian
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} machByteOrder
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{
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(*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian
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};
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switch (machByteOrder) {
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case LittleEndian:
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{
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nanF.wordL.wordLuint = 0xFFC00000U;
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break;
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}
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case BigEndian:
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{
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nanF.wordL.wordLuint = 0x7FFFFFFFU;
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break;
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}
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}
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return nanF.wordL.wordLreal;
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}
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}
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